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| WEDNESDAY, June 9, 2004, 8:30 AM - 10:00 AM | Room: 6D | ||
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TOPIC AREA: SYSTEM-LEVEL DESIGN AND VERIFICATION | ||
| SESSION 19 | |||
| Advances in Accelerated Simulation | |||
| Chair: Wolfgang Roesner - IBM Corp., Austin, TX | |||
| Organizers: Avi Ziv, Yaron Kashi | |||
| This session discusses techniques for achieving high performance simulations for SoCs and other complex designs. The approaches vary from circuit aware architectural level simulation to efficient co-simulaton with hardware acceleration. | |||
 19.1 |
Communication-Efficient Hardware Acceleration for Fast Functional Simulation |
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| Speaker(s): | Young-Il Kim - KAIST, Daejeon, Republic of Korea | ||
| Author(s): | Young-Il Kim - KAIST, Daejeon, Republic of Korea Wooseung Yang - KAIST, Daejeon, Republic of Korea Young-Su Kwon - KAIST, Daejeon, Republic of Korea Chong-Min Kyung - KAIST, Daejeon, Republic of Korea | ||
| 19.2 | A Fast Hardware/Software Co-Verification Method for System-on-a-Chip by Using a C/C++ Simulator and FPGA Emulator with Shared Register Communication | ||
| Speaker(s): | Yuichi Nakamura - NEC Corp., Kawasaki-City, Japan | ||
| Author(s): | Yuichi Nakamura - NEC Corp., Kawasaki-City, Japan Kouhei Hosokawa - NEC Corp., Kawasaki-City, Japan Ichiro Kuroda - NEC Corp., Kawasaki-City, Japan Ko Yoshikawa - NEC Corp., Fuchu-City, Japan Takeshi Yoshimura - Waseda Univ., Kitakyusyu-City, Japan | ||
| 19.3 | CircuitAware Architectural Simulation | ||
| Speaker(s): | Seokwoo Lee - Univ. of Michigan, Ann Arbor, MI | ||
| Author(s): | Seokwoo Lee - Univ. of Michigan, Ann Arbor, MI Shidhartha Das - Univ. of Michigan, Ann Arbor, MI Valeria Bertacco - Univ. of Michigan, Ann Arbor, MI Todd Austin - Univ. of Michigan, Ann Arbor, MI David Blaauw - Univ. of Michigan, Ann Arbor, MI Trevor Mudge - Univ. of Michigan, Ann Arbor, MI | ||
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